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HD74HC668/hd74hc669 synchronous up/down decade counter synchronous up/down 4-bit binary counter description this synchronous presettable decade counter features an internal carry look-ahead for cascading in high- speed counting applications. synchronous operation is provided by having all flip-flops clocked simultaneously so that the outputs change coincident with each other when so instructed by the count- enable inputs and internal gating. this mode of operation helps eliminate the output counting spikes that are normally associated with asynchronous (ripple-clock) counters. a buffered clock input triggers the four master-slave flip-flops on the rising (positive going) edge of the clock waveform. this counter is fully programmable; that is, the outputs may each be preset to either level. the load input circuitry allows loading with the carry-enable output of cascaded counters. as loading is synchronous, setting up a low level at the load input disables the counter and causes the outputs to agree with the data inputs after the next clock pulse. the carry look-ahead circuitry provides for cascading counters for n-bit synchronous applications without additional gating. instrumental in accomplishing this function are two count enable inputs and a carry output. both count enable inputs ( p and t ) must be low to count. the direction of the count is determined by the level of the up/down input. when the input is high, the counter counts up; when low, it counts down. input t is fed forward to enable the carry output. the carry output thus enabled will produce a low-level output pulse with a duration approximately equal to the high portion of the q a output when counting up and approximately equal to the low portion of the q a output when counting down. this low level overflow carry pulse can be used to enable successive cascaded stages. transitions at the enable p or t inputs are allowed regardless of the level of the clock input. all inputs are diode-clamped to minimize transission- line effects, thereby simplifying system design. this counter features a fully independent clock circuit. changes at control inputs (enable p , enable t , load, up/down) that will modify the operating mode have no effect until clocking occurs. the function of the counter (whether enabled, disabled, loading, or counting) will be dictated solely by the conditions meeting the stable setup and hold times. features high speed operation high output current: fanout of 10 lsttl loads wide operating voltage: v cc = 2 to 6 v low input current: 1 ? max
HD74HC668/hd74hc669 2 low quiescent supply current: i cc (static) = 4 ? max (ta = 25?) pin arrangement HD74HC668 1 2 3 4 5 6 7 8 u/ d ck a b c d gnd enable p data inputs outputs v cc q a q b q c q d enable t load ripple carry output 16 15 14 13 12 11 10 9 (top view)
HD74HC668/hd74hc669 3 hd74hc669 1 2 3 4 5 6 7 8 u/ d ck a b c d gnd enable p data inputs outputs v cc q a q b q c q d load enable t ripple carry output 16 15 14 13 12 11 10 9 (top view)
HD74HC668/hd74hc669 4 logic diagram HD74HC668 q a q b q c d b enable t enable p d a load ck u/ d d c d d q d rco v cc q l ck t q in q l ck t q in q l ck t q in q l ck t q in
HD74HC668/hd74hc669 5 hd74hc669 q a q b q c d b enable t enable p d a load ck u/ d d c d d q d rco v cc q t q in q t q in q t q in q t q in
HD74HC668/hd74hc669 6 timing chart HD74HC668 78901 2 210 987 2 2 load a b c d data inputs clock q a q b q c q d load count up inhibit count down ripple carry output enable p and t u/ d
HD74HC668/hd74hc669 7 hd74hc669 13 14 15 0 1 2 2 2 1 0 15 14 13 load a b c d data inputs clock q a q b q c q d load count up inhibit count down ripple carry output p and t u/ d
HD74HC668/hd74hc669 8 dc characteristics ta = 25 c ta = ?0 to +85 c item symbol v cc (v) min typ max min max unit test conditions input voltage v ih 2.0 1.5 1.5 v 4.5 3.15 3.15 6.0 4.2 4.2 v il 2.0 0.5 0.5 v 4.5 1.35 1.35 6.0 1.8 1.8 output voltage v oh 2.0 1.9 2.0 1.9 v vin = v ih or v il i oh = ?0 m a 4.5 4.4 4.5 4.4 6.0 5.9 6.0 5.9 4.5 4.18 4.13 i oh = ? ma 6.0 5.68 5.63 i oh = ?.2 ma v ol 2.0 0.0 0.1 0.1 v vin = v ih or v il i ol = 20 m a 4.5 0.0 0.1 0.1 6.0 0.0 0.1 0.1 4.5 0.26 0.33 i ol = 4 ma 6.0 0.26 0.33 i ol = 5.2 ma input current iin 6.0 0.1 1.0 m a vin = v cc or gnd quiescent supply current i cc 6.0 4.0 40 m a vin = v cc or gnd, iout = 0 m a
HD74HC668/hd74hc669 9 ac characteristics (c l = 50 pf, input t r = t f = 6 ns) ta = 25 c ta = ?0 to +85 c item symbol v cc (v) min typ max min max unit test conditions maximum clock f max 2.0 5 4 mhz frequency 4.5 27 21 6.0 32 25 propagation delay t plh 2.0 200 250 ns clock to ripple carry out time t phl 4.5 40 50 6.0 34 43 t plh 2.0 225 280 ns clock to q t phl 4.5 45 56 6.0 38 48 t plh 2.0 150 190 ns enable t to ripple carry out t phl 4.5 30 38 6.0 26 33 t plh 2.0 200 250 ns u/ d to ripple carry out t phl 4.5 40 50 6.0 34 43 pulse width t w 2.0 80 100 ns 4.5 16 20 6.0 14 17 setup time t su 2.0 100 125 ns data to clock 4.5 20 25 6.0 17 21 t su 2.0 150 190 ns enable p , t to clock 4.5 30 38 6.0 26 33 t su 2.0 150 190 ns loadk to clock 4.5 30 38 6.0 26 33 t su 2.0 150 190 ns u/ d to clock 4.5 30 38 6.0 26 33
HD74HC668/hd74hc669 10 ac characteristics (c l = 50 pf, input t r = t f = 6 ns) (cont) ta = 25 c ta = ?0 to +85 c item symbol v cc (v) min typ max min max unit test conditions hold time t h 2.0 5 5 ns 4.5 5 5 6.0 5 5 output rise/fall t tlh 2.0 75 95 ns time t thl 4.5 5 15 19 6.0 13 16 input capacitance cin 5 10 10 pf
hitachi code jedec eiaj weight (reference value) dp-16 conforms conforms 1.07 g unit: mm 6.30 19.20 16 9 8 1 1.3 20.00 max 7.40 max 7.62 0.25 + 0.13 ?0.05 2.54 0.25 0.48 0.10 0.51 min 2.54 min 5.06 max 0 ?15 1.11 max
hitachi code jedec eiaj weight (reference value) fp-16da conforms 0.24 g unit: mm *dimension including the plating thickness base material dimension *0.22 0.05 *0.42 0.08 0.12 0.15 m 2.20 max 5.5 10.06 0.80 max 16 9 1 8 10.5 max + 0.20 ?0.30 7.80 0.70 0.20 0 ?8 0.10 0.10 1.15 1.27 0.40 0.06 0.20 0.04
hitachi code jedec eiaj weight (reference value) fp-16dn conforms conforms 0.15 g unit: mm *dimension including the plating thickness base material dimension 1.27 16 9 1 8 0.15 0.25 m 1.75 max 3.95 *0.22 0.03 9.9 0 ?8 10.3 max + 0.10 ?0.30 6.10 + 0.67 ?0.20 0.60 + 0.11 ?0.04 0.14 *0.42 0.08 0.635 max 0.40 0.06 0.20 0.03 1.08
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